PRISM Forum - Message Replies
Topic: PRISM Questions and Answers
Topic Posted by: SRC
Date Posted: Wed Jan 12 8:33:33 US/Eastern 2000
Topic Description: Welcome to the PRISM forum! Please feel free to post your questions and comments about the PRISM assessment software here.
Posted by: don miller
Date posted: Sat Dec 8 18:38:35 US/Eastern 2001
Subject: random geneic hardware failure rate
30 +years at Boeing. first 10 big hero in OR. logistic analysis , Otimum spares provisioning. I did it all. I had 3 years at TRW 1969 -1972. had the chance to review the basic notion of random failures. Back to Boeing. worked MM AWACS B1 guess what never found a ransom failure which met the criteria for inclusion into MTBF prediction effort. Finally (like Einsten who took 7 years to get rid of wrong ideas)I wised up. Have sound data which shows that any notion of predicting frequency of hardware failures is absurd. Wearout is ok. Failures occur (big time in early MM). However they are virtually always related to design problems, human error, manufacturing problems ect. Please help us rid the aerospace industry of this triva. Or any other foolish folks .I have seen a few MTBF statements on PC. Not many.
Subject: Hooray for Don - and All Those Who Understand
Reply Posted by: Kirk Gray
Organization: Accelerel Engineering
Date Posted: Mon Feb 4 13:28:49 US/Eastern 2002
Way to Go Don,
It took awhile, but finally you have seen clearly that electronics fail because of errors in design or manufacturing, flaws that cannot be predicted anymore than when a building is going to fall down. Even when you consider wearout, the effort in prediction is pointless. Almost all solid-state electronics circuits and systems without latent defects (which are mostly special cause variation) are going to last 20 to 30 years or more. For most applications of electronics, the wearout failures will occur long after its technological obsolescence. Get real folks, Don is right. Electroncis failure prediction is the biggest waste of energy and resources that a company can make, yet still hundreds are doing it, thinking that has anything to do with why failures occur in electronics. Most that have realized the futility of this effort have also discover how to find factors that will affect reliability and fix them before they go to the field. I am the chairman of the IEEE/CPMT committee (TC-7, Reliability and Accelerated Stress Testing) that is trying to educate engineers on the reality of electronics relaibility today, but the dinosaurs of predicition still dominate and it has been a very tough battle to accept. I met and showed BOEING Engineers who were working on the 777 (Charles Leonard, Bob Deppe, and from the Univ. of Maryland [CALCE], Dr. Abhijit Dasgupta). BOEING called the stress testing RET (For reliability enhancement testing) that they used for a period of time, but I do not believe they are still using. If anyone would like to learn more about this efficient change in frame of reference in electronics reliability, please come to our next Accelerated Stress Testing Workshop (at http://www.ewh.ieee.org/soc/cpmt/tc7/ast2002/ )or contact me for more information. I hope that we can educate the others that no one has a crystal ball good enough to see the future mistakes in design or manufacturing that are the true cause of failures in electronics and that the wasted effort be redirect into stress testing to limits and stress screening be based on those limits to find lantent defects.