PRISM Forum - Message Replies
Topic: PRISM Questions and Answers
Topic Posted by: SRC
Date Posted: Wed Jan 12 8:33:33 US/Eastern 2000
Topic Description: Welcome to the PRISM forum! Please feel free to post your questions and comments about the PRISM assessment software here.
Posted by:Thomas Urbanczyk
(thomas.urbanczyk "at" systema-gmbh.de
Date posted: Fri Jan 20 5:14:35 US/Eastern 2006
Subject: IC,Memory/Microprocessor Model
By performing a MTBF FaultTree breakdown (PRISM was used for MTBF data input), I noticed the following issue regarding the IC,Memory/Microprocessor Model as utilized for main processors:
How is it possible, that the PRISM model of a highly complex microprocessor (e.g. Freescale PowerPC) will deliver a lower (baseline) item failure rate as the PRISM model of a lowcost And-Gate?
Both components has been modelled with the same parameters. I would expect the defect rate of the microprocessor significant higher.
Could you please explain this circumstance?
Could you furthermore make a proposal, how to represent the complexity of such highly complex ICs versus simple AND-Gate ICs with the given options in PRISM?
Case Temperature 50°C
Power Dissipated 1W
Reply Posted by: Thomas Urbanczyk
Organization: Systema Engineering
Date Posted: Thu Feb 2 2:59:45 US/Eastern 2006
thank you for your reply.
To be more precise, I'll make an example:
I modelled a simple "IC,Digital,Gate,AND" with the PRISM model "Use Case Temperature + Theta-JC*P".
The utilized parameters were:
Then I modelled a highly complex microprocessor by utilizing the IC,Digital,Micro Computer PRISM Part Type (I noticed, that it doesn't make a difference if I choose the IC,Digital,MICROPROCESSOR,16 BIT PRISM Part Type). I used the same PRISM model with identical input parameters as utilized for the AND-Gate.
The computed baseline failure rate of the microprocessor was not significant higher, as I would have expected. It was far from it. The PRISM computed baseline failure rate for the highly complex microprocessor was even roundabout 1% lower than the baseline failure rate of the simple AND-Gate. This does obviously not meet my understanding of reliability of complex components.
On this basis it is not possible for us to perform a MTBF breakdown of a complete module, as the MTBF critical main component won't be for example a PowerPC processor but already one or two AND-Gates.
I hope this explanation makes the problem more clear.