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Forum: Reliability & Maintainability Questions and Answers

Topic: Reliability & Maintainability Questions and Answers

Topic Posted by: Reliability & Maintainability Forum ( )
Organization: System Reliability Center
Date Posted: Mon Aug 31 12:47:36 US/Eastern 1998

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Posted by: Kevin
Date posted: Mon Sep 9 13:09:24 US/Eastern 2002
Subject: MOSFET Derating
We have a power MOSFET transistor (LDMOS), to be used in a ground benign environment, that we're derating from 200C to 150C. This FET can experience rapid changes in its output power and so will see significant thermal cycling. Is there any information on the reliability impact of thermal cycling on these devices and would this make us want to derate the device further? D-RATE doesn't seem to address this.


Subject: Power Transistor Cycling
Reply Posted by: B.W.Dudley ( )
Organization: RAC
Date Posted: Tue Sep 10 13:45:44 US/Eastern 2002
Cycling a power transistor does have an impact on the reliability failure rate as the power cycle results in a temperature change. This impact can be demonstrated using the RAC PRISM reliability program. Using your conditions of ground benign, I programmed the PRISM for 1 cycle, 1000 cycles, 10,000cycles and 100.000 cycles per year. The change in failure rate for the power transistor is 3% increase (1 to 1000 cycles), 6% increase (1 to 10,000 cycles) and 69% increase (1 to 100,000 cycles). Therefore, if you can control the number of cycles and reduce it to 10,000 or less per year you will see a better reliability for these components. You are correct, DRATE does not account for this condition.

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