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Forum: Reliability & Maintainability Questions and Answers

Topic: Reliability & Maintainability Questions and Answers

Topic Posted by: Reliability & Maintainability Forum (src_forum@alionscience.com )
Organization: System Reliability Center
Date Posted: Mon Aug 31 12:47:36 US/Eastern 1998

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Original Message:

Posted by: Rushabh
Date posted: Mon Mar 5 15:13:43 US/Eastern 2007
Subject: Why failure rate of a capacitor is higher for non-operating vs operating condition
Message:
Can you please try to find the failure rate with 10% duty cycle ? I might be that for 0% duty cycle calculation there is some bug in software. Ideally what you pointed out is correct. Operating mode failure rate should be higher than Non Operating.


Reply:

Subject: Failure rate of a capacitor is higher for non-operating vs operating condition
Reply Posted by: David Dylis (ddylis@alionscience.com )
Organization: Alion Science and Technology
Date Posted: Mon Mar 5 16:33:38 US/Eastern 2007
Message:
Please provide the type of capacitor that this issue relates to (e.g., ceramic, electrolytic (tantalum or aluminum), etc.). When I calculate the failure rate of a capacitor in PRISM based on your criteria, the failure rate of the capacitor in the dormant/non-operating mode is less than the operating coniditon.


Reply:

Ananya Subject: Response to David Dylis's question
Reply Posted by:
Date Posted: Mon Mar 5 16:42:19 US/Eastern 2007
Message:
Thank you for responding to my question. The capacitor type is chip ceramic (CDR). Details of both operating and non-operating conditions are given below:

Non-operating conditions:
Calculation Model:PRISM
Operating Temperature: -10C
Duty cycle : 0
Environment: GS, Ground Stationery
Operating Profile: Military Ground
Dormant Temperature: -10C
Relative Humidity: 40
Vibration Level: 0
Cycling Rate: 0
Process Grade: Part Quality Grade 3
Part Type: Capacitor, chip ceramic (CDR)
Year of Manufacture: 2005
Capacitance:0.1uF
Operating voltage: 0
Rated voltage: 50V
Voltage ratio: 0
Quantity: 12
Calculated failure rate of capacitor: 2.88774e-4
Calculated failure rate of system(in which there is only 1 component, this capacitor): 1.94387e-4

Operating conditions:
Calculation Model: PRISM
Operating Temperature: -10C
Duty cycle : 100
Environment: GS, Ground Stationery
Operating Profile: Military Ground
Dormant Temperature: -10C
Relative Humidity: 40
Vibration Level: 0
Cycling Rate: 1
Process Grade: Part Quality Grade 3
Part Type: Capacitor, chip ceramic (CDR)
Year of Manufacture: 2005
Capacitance:0.1uF
Operating voltage: 0.001
Rated voltage: 50V
Voltage ratio: 0.002
Calculated failure rate of capacitor: 0.000140
Calculated failure rate of system(in which there is only 1 component, this capacitor): 9.42406e-5


Reply:

Subject: Capacitor Failure Rate
Reply Posted by: John Cloarec
Date Posted: Mon Mar 5 16:44:41 US/Eastern 2007
Message:
Ananya, I thimk your problem is based on the fact that you are using negative temperature. If you look to MIL HSBK 217, section 3.4.1, it is stated "Extrapolation of any of the base faihn rate models beyond the tabulated value such as high or subzero temperature, electrical stress values above 1.0, or extrapolation of any associated model modifiers is oompletety invalid". If you look to the table supporting the Lambda/b calculation for capacitors, they all begin to 0C until 5C before the Max Rated Temperature. Your problem is not due to your duty cycle but to temperature. Regards, John.


Reply:

Subject: Capacitor failure rate for specialized scenario
Reply Posted by: David Dylis (ddylis@alionscience.com )
Organization: System Reliability Center
Date Posted: Mon Mar 5 16:49:27 US/Eastern 2007
Message:
For the specialized situation that you identified, PRISM does calculate a higher failure rate for multi-layer chip capacitors in a Non-Operating environment then in the Operating scenario.

The parameters you have chosen for environment and usage have negated the affects of temperature cycling, vibration, power on/off cycling, and component stress from the analysis for the capacitors in question. Therefore, the operational, cycling and solder joint portions of the capacitor failure rate are zero for the capacitor in your operational and non-operational scenarios (please review the PRISM failure rate tab for each component). The only factors that remain are the non-operational and EOS/ESD failure rate contributions. For capacitors, the EOS/ESD failure rate is a constant that does not change based on operation/environment. The failure rate due to non-operation is zero for a capacitor that is operating at a 100% duty cycle while there is a non-operational failure rate for a capacitor that is in a non-operating scenario. As a result we now have a capacitor with a predicted non-op failure rate that is higher than what is predicted in the operational scenario.

You have identified a specific set of parameters that negate the operational portion of the capacitor failure rate. This issue needs further analysis and will require update to the capacitor model in a future PRISM version. In the meantime, I recommend that you use the PRISM default parameters for stress and capacitance when performing an analysis based on your operational conditions.

If you have any additional questions, feel free to contact me.


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