SRC Forum - Message Replies
Forum: Reliability & Maintainability Questions and Answers
Topic: Reliability & Maintainability Questions and Answers
Topic Posted by: Reliability & Maintainability Forum
Organization: System Reliability Center
Date Posted: Mon Aug 31 12:47:36 US/Eastern 1998
Posted by: Hei-Ruey Harry Jen
Date posted: Fri Dec 10 13:46:48 US/Eastern 1999
Subject: Minimum SiN passivation thickness
I have always used the 0.5 Ám thick SiN as the guideline for chip passivation. Is there any publication actually prove that is the minimum thickness for a moisture barrier? Please give me the source if you know. Thanks.
Subject: Passivation Thickness
Reply Posted by: Seymour Morris
Organization: Reliability Analysis Center
Date Posted: Mon Dec 20 16:24:14 US/Eastern 1999
You may want to check out the following two references.
1. "Evaluation of polymeric coatings for MCM applications" apperaring in Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on [see also Components, Hybrids, and Manufacturing Technology, IEEE Transactions, Pages: 658 - 665, Nov. 1995, Vol. 18, Issue: 4. In this paper, the moisture protection performance of the coatings on nonpassivated test chips is presented in detail. In addition, some overall comparisons of the failures in passivated and nonpassivated chips are given. The comparison of passivated and nonpassivated coated Sandia ATCO1 test chips revealed that the presence of passivation enhances the moisture protection.
2. "Environmental Performance of Sealed Chip-On-Board (scob) Memory Circuits," Multichip Modules, 1994. Proceedings of the 1994 International Conference on, Pages: 443 - 448 April 13-15, 1994. This reference describes a complete design of experiments (DOE) matrix, which included two PWB sources, three die attachment adhesives, one moisture passivation coating (plasma enhanced, chemical vapor deposited silicon nitride), and two encapsulants (a silicone gel and an epoxy glob-top material).